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Analog Master
September,2001
Wave Wave
We can find various size of waves generated in the ocean. The wave is sometimes energetic sometimes week according to the forces of nature and the gravitational effect of the moon, an infinitely continuous activity. We can also find another kind of wave in electric circuits: the wave of an analog signal. This wave has great significance for humankind, despite it being much smaller than the wave in the ocean. Engineers seek to control the analog signal, this tiny and great wave, to improve the performance and accelerate downsizing of an application system.
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NEC introduces Analog Master, which is a semi-custom LSI just for handling the wave of analog signals, and proposes the use the Analog Master to integrate analog circuits on one-chip, supporting powerful library of macros, variety of masters and reliable development tools.
CONTENTS
NEC's ASICs ........................................... 4 What is Analog Master ? .......................... 5 Features of Analog Master ....................... 6 Product Line-up of Analog Master ............ 7 Circuit Scale of Each Family .................... 8 CHS Family CHS-A Family M-CHS Family Packages Development of Analog Master 9 12 15 18 22
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NEC's ASICs
Classification of ASICs
Full-custom LSI ASCP/USIC Semi-custom LSI
Gate array
Cell-based IC ASIC Analog Master
Mixed Signal ASIC
Image processing LSI
Audio LSI
ASSP
Automobile LSI
Telecom. LSI
etc. ASIC ASCP USIC ASSP : Application Specific IC : Application Specific Custom Product : User Specific IC : Application Specific Standard Product
Remark For details about the Gate array and Cell-based IC, please refer to ASIC Line-up Pamphlet(A10696E).
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What is Analog Master?
The Analog Master is a semi-custom LSI for creating analog circuits on a master wafer by inter-connecting pre-diffused elements (bipolar transistors, resistors, and capacitors, already formed on the wafer) with the user-defined wiring. Analog Master is ideal for users who want to develop small-lot analog LSIs with low development cost in a short development period.
Realization image of an analog LSI by using Analog Master
Bipolar process Transistors, resistors, and capacitors already formed on master wafer Elements at fixed positions
One-chip integration of analog circuits on user's application
Operational amplifier Transistors for small signal
Resistors
Comparator Capacitors
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Features of Analog Master
Very short development period Four to eight weeks from layout design to ES (Engineering Sample) production Powerful line-up 3 families (13 masters) are provided to cover wide range of operating frequency, voltage, and number of elements used. General-purpose Analog Master CHS family : 5 masters General-purpose Analog Master CHS-A family : 3 masters High voltage Analog Master M-CHS family : 5 masters Various macro libraries To reduce user's works, variety of macros are provided such as operational amplifier, comparator, regulator, etc.
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Product Line-up of Analog Master
NEC's Analog Master is classified in the following 3 families(refer to the figure below). CHS family and CHS-A family for wide application field M-CHS family for high voltage
From this wide line-up (3 families 13 masters), user can achieve the optimum analog LSI.
Line-up and features
Number of elements
CHS family M-CHS family
PC5024
CHS-A family
PC5204 PC5022 PC5034
PC5203
PC5021
Function
PC5202 PC5020 PC5032
PC5201
PC5023
PC5031
For general-purpose
PC5200
For low power consumption or for driving circuit
Voltage For high voltage
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Circuit Scale of Each Family
The scale of the circuit that can be integrated on the analog master differs depending on the model of each family. The scale of the circuit that can be integrated shown below is roughly calculated in terms of the number of circuits where one circuit is equivalent to the general-purpose operational amplifier PC4558Note 1.
Number of circuits equivalent to PC4558(unit: circuits)
30
PC5024(28) PC5204(24)
20
PC5022(16) PC5021(12) PC5034(16) PC5032(12) PC5202(9) PC5031(4) PC5201(5) PC5200(3) PC5203(16)
10
PC5020(8) PC5023(4)
0
CHS family
CHS-A family
M-CHS family
(Numbers in the parentheses indicate the number of circuitsNote 2 that can be integrated.)
Notes 1. One of the two operational amplifiers in the general-purpose operational amplifier PC4558 package (8-pin DIP) is counted as one circuit.
One circuit
2. The number of circuits shown above is a guideline in which only operational amplifiers are integrated, and does not include operational amplifier peripheral circuits (such as feedback circuits). When selecting a model, estimate the circuit scale by taking these peripheral circuits into consideration.
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CHS Family
Features of CHS family
High speed transistors (NPN : 6 GHz, Vertical PNP : 280 MHz) Excellent hFE linearity of transistor Easy to configure low power circuits Adequate for circuit operating at up to 12 V and 50 MHz Variety of macro libraries
Element characteristics of CHS family
Element characteristics of CHS family
Element Item Voltage NPN Transient frequency (fT) PNP Transistor NPN hFE standard value PNP CLP1 : 7.0 MHz CVP1 : 280 MHz CHT1 : 100 (IC = 500 A) CTW4 : 100 (IC = 500 A) CLP1 : 200 (IC = 10 A) CVP1 : 75 (IC = 10 A) hFE linearity (CHT1) hFE (IC = 10 A)/hFE (IC = 100 A) = 1.00 Absolute accuracy : 15 % (Ion-implanted) : 20 % (Polysilicon) Resistor Resistance accuracy Relative accuracy (between adjacent resistors) : 2 % (Ion-implanted) : 3 % (Polysilicon) Capacitor Capacitance accuracy Absolute accuracy : 15 % Relative accuracy : 2 % (between adjacent resistors) Description 14 V (Absolute maximum ratings) CHT1 : 4.5 GHz CTW4 : 6.0 GHz
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CHS Family
Element configuration of CHS family
5 masters are available from PC5023 to PC5024 for small to large complexity circuit, respectively. The CHS family should be designed so that the utilization rate of each element is up to 70 % (Only PC5023 should be designed up to 60 %).
Masters of CHS family
Part Number Technology Supply voltage Number of pads Total number of elements Total number of transistors CHT1 NPN transistors CEW4 8 8 8 4 80 CTW4 28 1627 484 224 28 32 2327 688 320 40
PC5020 PC5021 PC5022 PC5023 PC5024
Remarks Name : CHS Abusolute maximum ratings
High-speed bipolar technology 14 V 50 3041 892 416 52 22 726 245 112 13 80 6151 1508 672 84
IC(MAX.) = 2 mANote1 IC(MAX.) = 18 mANote2 IC(MAX.) = 18 mANote2 (For electro-static protection)
CLP1 PNP transistors CVP1
168
240
312
84
504
IC(MAX.) = 0.05 mANote1 (Lateral type) IC(MAX.) = 0.5 mANote1 (Vertical type)
56 1116 544
80 1600 784
104 2098 1024
32 468 224
168 4560 1664
Total number of resistors 500
Ionimplanted resistors
P+ resistor
5 k
544
784
1024
200
2496
P- resistor
2.5 k Polysilicon resistors 3 k Number of capacitors(5 pF)
28
32
50
N+ resistor
44 27 39 51 13
400 83
N+ resistor MOS capacitor
Notes 1. IC(MAX.) is a collector current value that reduces the value of DC current amplification factor hFE by 30 % compared to its peak value. 2. Maximum collector current value whose reliability can be guaranteed because it is limited by the maximum current density.
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CHS Family
Macro library
TEGs are also provided.
Macro library of CHS family
Function Library Name OA01A OA02A OA03A OA04B OA06B Operational amplifier OA06C OA07A OA07B OA08 OA09 OA10 CP02A Comparator CP04 RG01A Regulator RG02A RG03 SW01A Switch SW01B SW02 Timer TM01 Single power supply General-purpose General-purpose Low saturation Bi-directional switch (High-active) Bi-directional switch (Low-active) Signal switch Timer Feature General-purpose Single power supply, high-speed Low power High input impedance Single power supply, stable Single power supply, Vom improved High-speed, high stability High-speed, wide band Low noise General-purpose (reduced element version) NPN input low noise High-speed
+
Specifications VIO : 1.4 mV (TYP.) SR : 8 V/ s (TYP.)
+
Equivalent
Availability Available Available Available Available
PC4558 PC842 PC4250
ICC : 5 A (TYP.,ISET = 1 A) IB : 1 nA (TYP.) VICM : 0 to V Vom
+ +
+
_ 1.5V
PC358 PC358
Available Available Available Available Available Available Available
: V _ 1.2 V (MIN.)
SR : 70 V/s (TYP.)
+
GBW : 200 MHz (TYP.) en: 6.5 nV/Hz (TYP.) VIO : 1.2 mV (TYP.) en : 3 nV/Hz (TYP.) tPD : 80 ns (TYP.) tPD : 0.5 s (TYP.) VO : 1.3 to 9.0 V VO : 2.7 to 9.5 V
PC319 PC393
Available Available Available Available Available Available
Available Available
PC1555
Available
Remark TEG (Test Element Group) is a sample of macro.
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CHS-A Family
Features of CHS-A family
Compatible with the CHS family (same process as CHS family is employed) Many-pin masters solving shortage of number of pins Total internal resistance 2 times higher than the CHS family Internal transistor for output driver (drive up to 50 mA ) Super white TEG supporting application to microcontroller's peripheral analog circuits
Element characteristics of CHS-A family
Element characteristics of CHS-A family
Element Item Voltage Description 14 V (Absolute maximum ratings) NPN Transient frequency (fT) PNP Transistor NPN hFE standard value PNP CLP1 : 7.0 MHz CVP1 : 280 MHz CST1 : 100 (IC = 500 A) CTW3 : 100 (IC = 500 A) CLP1 : 200 (IC = 10 A) CVP1 : 75 (IC = 10 A) hFE linearity (CST1) hFE (IC = 10 A)/hFE (IC = 100 A) = 1.00 Absolute accuracy : 15 % (Ion-implanted) 20 % (Polysilicon) Resistor Resistance accuracy Relative accuracy (between adjacent resistors) : 2 % (Ion-implanted) 3 % (Polysilicon) Capacitor Capacitance accuracy Absolute accuracy : 15 % Relative accuracy : 2 % (between adjacent resistors) CST1 : 4.5 GHz CTW3 : 5.0 GHz
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CHS-A Family
Element configuration of CHS-A family
Three masters with a different circuit scale and number of output driver transistors are available. The CHS-A family should be designed so that the utilization rate of each element is up to 70 %.
Masters of CHS-A family
Part Number Technology Supply voltage Number of pads Total number of elements Total number of transistors CST1 NPN transistors CEW4 13
Note3
PC5031
PC5032
High-speed bipolar technology 14 V
PC5034
Remarks Name : CHS Absolute maximum ratings
36 575 223 90 15
56 1471 578 240 40 18
Note3
82 2251 896 360 60 26
Note 3
IC(MAX.) = 2 mA
Note1
CTW3
IC(MAX.) = 18 mANote2 IC(MAX.) = 25 mANote2 (For electro-static protection) IC(MAX.) = 0.05 mA
Note1
CLP1 PNP transistors CVP1 Total number of resistors 2 k
90
240
360
(Lateral type) IC(MAX.) = 0.5 mA
Note1
15 338 58
40 854 154
90 1266 234
(Vertical type)
Ionimplanted resistors
P- resistor
10 k
232
616
936
P- resistor
Polysilicon resistors
3 k
48 14
84 39
96 89
N+ resistor MOS capacitor
Number of capacitors(5 pF)
Notes 1. IC(MAX.) is a collector current value that reduces the value of DC current amplification factor hFE by 30 % compared to its peak value. 2. Maximum collector current value whose reliability can be guaranteed because it is limited by the maximum current density. 3. When used as 50-mA output drivers, the number of elements is halved.
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CHS-A Family
Macro library
TEGs are also provided.
Macro library of CHS-A family
Function Library Name OA0301 OA0302 OA0303 Operational amplifier OA0304 OA0306B OA0309 Comparator Regulator Switch Super white Note TEG CP0304 RG0301 SW0302 Feature General-purpose Single power supply, high-speed Low power High input impedance Single power supply, general-purpose General-purpose (reduced element version) Single power supply General-purpose Signal switch Operational amplifier x 2, regulator, signal switch, driver x 2 tPD : 0.5 s (TYP.) VO : 1.3 to VCC -- 2 V Specifications VIO : 1.4 mV (TYP.) SR : 5 V/s (TYP.)
+
Equivalent
Availability Available Available Available Available
PC4558 PC842 PC4250
ICC : 6 A (TYP.,ISET = 1 A ) IB : 1 nA (TYP.) VICM : 0 to V -1.4 V (TYP.)
+
PC358
Available Available
PC393
Available Available Available
WT03A
Available
Note Provided with an analog circuit for use microcontroller peripherals. (package : 30-pin shrink DIP)
VDD
Sensor element Sensor amplifier Single-chip microcontroller 78K series
1 2 3 4 5
Constantcurrent circuit
30
NPN driver PNP driver
29 28 27
6 7
GND
Reset circuit
Selector switch
26 25 24
8
Regulator
Operational amplifier
23 22
5V regulator IN OUT Rectification element Reset IC
VDD VDD
RST
9 10 11 12 13 14
To each block VCC Zero-cross circuit Operational amplifier
21 20 19 18 17 16
VDD
Zero cross comparator LED driver
15
Super white TEG block diagram
Relay driver
Example of using super white TEG Use the Super White TEG at the locations enclosed by the dotted lines in figure.
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M-CHS Family
Features of M-CHS family
Maximum supply voltage : 44 V High speed transistors (NPN : 2 GHz, vertical PNP : 50 MHz) Incorporates low noise lateral PNP transistors (HLP2A transistor) Adequate for circuit operating at up to 40 V and 10 MHz
Element characteristics of M-CHS family
Elememt characteristics of M-CHS family
Element Item Voltage NPN Transient frequency (fT) PNP Transistor NPN hFE standard value PNP Description 44 V (Absolute maximum ratings) HDT1 : 2 GHz HTW4 : 2 GHz HLP2 : 2 MHz HVP3 : 50 MHz HDT1 : 100 (IC = 500 A) HTW4 : 100 (IC = 500 A) HLP2 : 100 (IC = 10 A) HVP3 : 100 (IC = 10 A) hFE linearity (HDT1) hFE (IC = 10 A)/hFE (IC = 100 A) = 1.00 Absolute accuracy : 15 % (Ion-implanted) 20 % (Polysilicon) Relative accuracy (between adjacent resistors) : 2 % (Ion-implanted) : 3 % (Polysilicon) Absolute accuracy : 15 % Capacitor Capacitance accuracy Relative accuracy : 2 % (between adjacent capacitors)
Resistor
Resistance accuracy
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M-CHS Family
Element configuration of M-CHS family
5 masters are available from PC5200 to PC5204 for small to large complexity circuit, respectively. The M-CHS family should be designed so that the utilization rate of each element is up to 70 %.
Masters of M-CHS family
Part Number Technology Supply voltage Number of pads Total number of elements Total number of transistors HDT1 NPN transistors HTW4 HEW4 HTT5 HLP2 PNP transistors 24 653 189 72 9 12 12 48 28 1029 303 120 15 14 14 80
PC5200
PC5201
PC5202
PC5203
PC5204
Remarks Name : M-CHS Absolute maximum ratings
High-speed, high voltage bipolar technology 44 V 40 1786 535 216 27 20 20 144 52 3087 932 384 48 26 26 256 62 4561 1382 576 72 31 31 384
IC(MAX.) = 1.0 mANote1 IC(MAX.) = 10 mA
Note1
IC(MAX.) = 10 mANote1 IC(MAX.) = 18 mANote2 IC(MAX.) = 0.12 mA (Lateral type) Low noise PNP Note1 IC(MAX.) = 0.12 mA (Lateral type) IC(MAX.) = 1.0 mA
Note1 Note1
HLP2A
18
30
54
96
144
HVP3 Total number of resistors 500
18 456 144
30 712 240
54 1225 426
96 2108 760
144 3108 1144
(Vertical type)
Ionimplanted resistors
P+ resistor
10 k
216
360
639
1140
1716
P- resistor
Polysilicon resistors
500
96 8
112 14
160 26
208 47
248 71
N+ resistor MOS capacitor
Number of capacitors(5 pF)
Notes 1. IC(MAX.) is a collector current value that reduces the value of DC current amplification factor hFE by 30 % compared to its peak value. 2. Maximum collector current value whose reliability can be guaranteed because it is limited by the maximum current density.
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M-CHS Family
Macro library
TEGs are also provided.
Macro library of M-CHS family
Function LibraryName OA201 OA202 OA203 OA204 Operational amplifier OA205A OA205B OA205C OA206 OA207 Comparator Regulator CP201 CP202 RG201 SW201A Switch SW201B SW202 Feature General-purpose Single power supply, stable Low power High input impedance High-speed, high stability High-speed, wide band High-speed, 1 block version Low noise Single power supply, high-speed Single power supply High-speed General-purpose Bi-directional switch (High-active) Bi-directional switch (Low-active) Signal switch en : 4.5 nV/Hz (TYP.) SR : 7.5 V/s (TYP.)
+
Specifications VIO : 1.0 mV (TYP.) VICM : 0 to V - 1.5 V
+
Equivalent
Availability Available Available Available Available Available Available Available
PC4558 PC358 PC4250
ICC : 16 A (TYP., ISET = 2 A) IB : 1.2 nA (TYP.) SR : 30 V/s (TYP.)
+
funity : 50 MHz (TYP.)
PC4570 PC842
Available Available Available
tPD : 3 s (TYP.) tPD : 180 ns (TYP.)
PC319
Available Available Available
Available Available
Remark TEG (Test Element Group) is a sample of macro.
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Packages
To meet various requirements about the package type and the number of pins, variety of packages are available for the Analog Master. User can select optimum combination for each application. For availability, refer to the tables of the following pages.
Packages available for Analog Master
DIP
14-pin (7.62 mm(300)) 16-pin (7.62 mm(300)) 18-pin (7.62 mm(300)) 22-pin (10.16 mm(400))
Shrink DIP
18-pin (7.62 mm(300)) 20-pin (7.62 mm(300)) 22-pin (7.62 mm(300)) 24-pin (7.62 mm(300)) 28-pin (10.16 mm(400)) 30-pin (10.16 mm(400)) 42-pin (15.24 mm(600)) 48-pin (15.24 mm(600))
SOP
8-pin (5.72mm (225)) 14-pin (5.72mm (225)) 16-pin (5.72mm (225)) 16-pin (7.62mm (300)) 16-pin (9.53mm (375)) 20-pin (7.62mm (300)) 24-pin (7.62mm (300)) 24-pin (9.53mm (375)) 28-pin (9.53mm (375))
Shrink SOP
14-pin (5.72mm (225)) 16-pin (5.72mm (225)) 20-pin (5.72mm (225)) 20-pin (7.62mm (300)) 24-pin (7.62mm (300)) 30-pin (7.62mm (300)) 36-pin (7.62mm (300)) 38-pin (7.62mm (300))
QFP
48-pin ( 7 x 7 ) 48-pin (10 x 10) 48-pin (10 x 14) 56-pin (10 x 10) 64-pin (14 x 20) 68-pin (10 x 14) 72-pin (10 x 10) 80-pin (14 x 14) 80-pin (14 x 20)
TQFP
48-pin ( 7 x 7 )
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Packages
Package availability of CHS family
Package 8-pin 14-pin DIP 16-pin 18-pin 22-pin 14-pin 18-pin 20-pin 22-pin Shrink DIP 24-pin 28-pin 30-pin 42-pin 48-pin 8-pin 14-pin 16-pin SOP 20-pin 24-pin 28-pin 14-pin 16-pin Shrink SOP 20-pin 0.65 mm 24-pin 30-pin 36-pin 0.65 mm 0.65 mm 0.8 mm 0.5 mm 48-pin QFP 64-pin 68-pin 80-pin TQFP 48-pin 0.65 mm 0.8 mm 1.0 mm 0.65 mm 0.8 mm 0.5 mm (7 x 7) (7 x 7) (7.62 mm) (7 x 7) (7 x 7) (10 x 10) (10 x 14) (10 x 14) (14 x 20) (10 x 14) (14 x 20) (7.62 mm) (7.62 mm) (7.62 mm) (7.62 mm) 1.27 mm 1.27 mm 1.27 mm 0.65 mm 0.65 mm 0.65 mm (5.72 mm) (7.62 mm) (7.62 mm) (9.53 mm) (7.62 mm) (7.62 mm) (9.53 mm) (9.53 mm) (9.53 mm) (5.72 mm) (5.72 mm) (5.72 mm) (7.62 mm) (7.62 mm)
Note Note
Lead Pitch 2.54 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.27 mm 1.27 mm 1.27 mm
PC5020
PC5021
PC5022
PC5023
PC5024
(5.72 mm) (5.72 mm) (7.62 mm) (9.53 mm) (5.72 mm)
Note Because the time is required to prepare for production, consult NEC before development. Also consult NEC when you use 42-pin shrink DIP packages. Remarks1. In the above table, ' ' indicates a package that is available, and ' - ' indicates a package that is unavailable. 2. Some packages may have unavailable pins. Please refer to the Analog Master Package Manual (A10495E) for unavailable pins.
Pamphlet A10512EJCV0PF
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Packages
Package availability of CHS-A family
Package 18-pin 22-pin Shrink 24-pin DIP 28-pin 30-pin 16-pin 20-pin SOP 24-pin 28-pin 24-pin Shrink SOP 30-pin 36-pin 38-pin 48-pin QFP 56-pin 80-pin TQFP 48-pin 1.27 mm 1.27 mm 0.65 mm 0.65 mm 0.80 mm 0.65 mm 0.5 mm 0.65 mm 0.65 mm 0.5 mm (7x7) (7x7) (7.62 mm) (7.62 mm) (7.62 mm) (9.53 mm) (7.62 mm) (7.62 mm) (7.62 mm) (7.62 mm) (7x7) ( 10 x 10 ) (7x7) ( 10 x 10 ) ( 14 x 14 ) (7x7) (9.53 mm) (9.53 mm) 1.778 mm 1.778 mm 1.27 mm 1.27 mm (7.62 mm) (7.62 mm) (10.16mm) (7.62 mm) (7.62 mm) 1.778 mm Lead Pitch 1.778 mm 1.778 mm (7.62 mm)
PC5031 PC5032 PC5034
Remarks1. In the above table, ' ' indicates a package that is available, and ' - ' indicates a package that is unavailable. 2. Some packages may have unavailable pins. Please refer to the Analog Master Package Manual (A10495E) for unavailable pins.
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Pamphlet A10512EJCV0PF
Packages
Package availability of M-CHS family
Package 8-pin 14-pin 16-pin 18-pin DIP 22-pin 24-pin 28-pin 42-pin 14-pin 20-pin Shrink DIP 24-pin 28-pin 30-pin 42-pin 48-pin 16-pin 20-pin SOP 24-pin 28-pin Shrink SOP 20-pin 24-pin 1.27 mm 1.27 mm 0.65 mm 0.65 mm 0.5 mm 48-pin 0.65 mm 0.8 mm QFP 56-pin 64-pin 72-pin 80-pin TQFP 48-pin 0.65 mm 1.0 mm 0.5 mm 0.65 mm 0.5 mm (7x7) ( 14 x 20 ) (10 x 10 ) (14 x 14 ) (10 x 14) (7.62 mm)
Note Note
Lead Pitch 2.54 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.778 mm 1.27 mm 1.27 mm
PC5200
PC5201
PC5202
PC5203
PC5204
(7.62 mm) (7.62 mm) (7.62 mm) (7.62 mm) (9.53 mm) (7.62 mm) (7.62 mm) (7x7) (10 x 10 ) (10 x 14 ) (10 x 10 ) (9.53 mm) (9.53 mm)
Note Because the time is required to prepare for production, consult NEC before development. Also consult NEC when you use 42-pin, or 48-pin shrink DIP packages. Remarks1. In the above table, ' ' indicates a package that is available, and ' - ' indicates a package that is unavailable. 2. Some packages may have unavailable pins. Please refer to the Analog Master Package Manual (A10495E) for unavailable pins.
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Development of Analog Master
The development of the Analog Master is completed by both the user and NEC. Passing the development work from the user to NEC is called interfacing. NEC supports only the circuit diagram level interface.
Interface Level Circuit design level System Design User's works Circuit Design Layout Design NEC's works ES Production
Circuit diagram level interface User completes up to system design, NEC takes over all subsequent works, such as circuit design and simulation. This interface level is classified into 3 more levels as shown in the table below, depending on parts configuring the circuit and whether or not to create and estimate a breadboard.
Level S level A level B level
Notes
Creation and Estimation of Breadboard Not necessary Necessary Necessary General-purpose SSI Standard SSI
Note 2 Note 1
Parts Configurating the Circuit , Standard SSI
Note 2
, Transistor for small signal, Analog Master TEG
Note 3
Note 3
, Resistors, Capacitors
, Transistor for small signal, Analog Master TEG
Note 3
, Resistors, Capacitors
Analog Master TEG
, Resistors, Capacitors (80 % or more is configured with macro)
1. General-purpose SSI : SSI except standard SSI 2. Standard SSI : OP amp. ( PC151/741, 251/1458, 258/4558, 451/324, 458/4741, 802/4250, 842, 844, 1251/358, 4556, and equivalents of other manufacturers) : Comparator ( PC177/1339, 271/311, 272/319, 277/393, and equivalents of other manufacturers) : Regulator (Three-terminal regulator, Shunt regulator) : Function block ( PC617/1555, and equivalents of other manufacturers) 3. Analog Master TEG : Library TEGs, basic block TEGs, super white TEGs provided by NEC.
Remark TEG (Test Element Group) is a sample for evaluation.
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Pamphlet A10512EJCV0PF
Development of Analog Master
Flow for circuit diagram level interface
User
Study of LSI development
NEC
Pamphlets
Study of circuit specification Decision to develop Request to develop
(Sample production period, mass-production schedule, special marking, etc.)
Manuals
Check
System circuit design
System circuit diagram, I/O waveform spec. , Electrical spec.
Circuit design
Simulation
Approval
Circuit diagram, simulation result, product specification
Layout and design
Preparation of test programs and test boards Production of ES ES (Only plastic package) Evaluation of ES OK NG CS request CS (Only plastic package) Mass-production request Approval Submission of shipment specification sheets Return of shipment specification sheets ES : Engineering sample CS : Commercial sample Remark Unlike CS and mass-produced model, the quality of ES is not guaranteed. Therefore, do not use the ES for production or reliability testing. Delivery Production of CS
NG
Inspection
Evaluation of CS OK
Evaluation of reliability
Mass-production
Inspection
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Development of Analog Master
Works by user Development flow
(1) Study of circuit specifications
User checks circuit requirements such as supply voltage range, pin voltages, circuit performance, package, and resistance to electro-static discharge (ESD)damage, according to manuals supplied by NEC.
(2) Request to develop
User requests NEC to develop the chip, and provides detailed descriptions of the followings. 1. Interface level 2. Master name, package 3. Scheduled interface date, ES/CS delivery date, schedule of mass-production 4. Request of special marking 5. Request of TEG
(3) Circuit design
User designs circuit configuration so as to realize required function and performance using parts configuring circuit on page 22 (system circuit design).
(4) Interface (circuit diagram level interface)
User sends the following interface documents to NEC after completion of system circuit design. 1. System block diagram 2. System circuit diagram 3. I/O waveform specifications 4. Electrical specifications 5. Check sheet It is recommended that the above documentation be submitted on special forms supplied by NEC. Describe in as much detail as possible because this is important information for IC design and simulation.
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Pamphlet A10512EJCV0PF
Development of Analog Master
(5) Approval of circuit diagram
Circuit diagram designed by NEC, simulation result, and product specification are sent to user. After all items are checked and approved by user, NEC starts layout design and ES production.
(6) Evaluation of ES and request to prepare CS
User evaluates engineering samples (ES). Two levels of samples are sent. One is standard sample, and the other called variation sample is for assersion of electrical characteristics (note that NEC does not assure characteristic variation to user with this sample). After the samples pass evaluation, user requests NEC to prepare commercial samples (CS) after discussing and determining actual specification of test condition list.
(7) Evaluation of CS and request to start mass-production
User evaluates commercial samples (CS). After the samples pass evaluation, user requests NEC to start mass production.
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25
Development of Analog Master
Works by NEC
(1) Helping user in studying LSI development
When user plans to develop particular LSIs, NEC is ready to give advices on whether the user's circuit specifications can be achieved from the viewpoint of the number of elements and element characteristics. Please consult NEC after determining the specifications.
(2) Circuit design
According to user's circuit requirements, NEC completes circuit design, and simulation, and prepares test conditions. This testing is only for DC items.
(3) Layout design
Layout design requires 1 to 4 weeks. In addition, before completion of layout design, back annotation is performed. Characteristics will be checked by extracting the parasitic elements to feedback to the circuit design side and performing simulation. Layout design requires one additional week for this checking.
(4) ES production
The user will usually receive the ES 3 to 4 weeks after completion of layout design.
(5) CS production
After request by user, NEC starts production of commercial samples. From CS production request, it takes in general 1 month for standard quality grade device, and 2.5 month for special quality grade device to deliver the CS. The above schedule is conditional upon whether the product specifications have been determined between the user and NEC.
(6) Preparation of shipment specification sheets
The shipment specification sheets describe absolute maximum ratings, electrical characteristics, package outline, and marking.
(7) Mass-production
NEC mass-produces the LSI according to the user's production schedule.
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Pamphlet A10512EJCV0PF
The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited without governmental license, the need for which must be judged by the customer. The export or re-export of this product from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative.
* The information in this document is current as of May, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. * NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. * NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above).
M8E 00. 4
Pamphlet A10512EJCV0PF
27
For further information, please contact:
NEC Corporation NEC Building 7-1, Shiba 5-chome, Minato-ku Tokyo 108-8001, Japan Tel: 03-3454-1111 http://www.ic.nec.co.jp/ [North & South America] NEC Electronics Inc. 2880 Scott Blvd. Santa Clara, CA 95050-2554, U.S.A. Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288 http://www.necel.com/ NEC do Brasil S.A. Electron Devices Division Rodovia Presidente Dutra, Km 214 07210-902-Guarulhos-SP Brasil Tel: 011-6462-6810 Fax: 011-6462-6829 [Europe] NEC Electronics (Germany) GmbH Kanzlerstr. 2, 40472 Dusseldorf, Germany Tel: 0211-650302 Fax: 0211-6503490 http://www.nec.de/ Munich Office Arabellastr. 17 81925 Munchen, Germany Tel: 089-921003-0 Fax: 089-92100315 Stuttgart Office Industriestr. 3 D-70565 Stuttgart, Germany Tel: 0711-99010-0 Fax: 0711-99010-19 Hannover Office Podbielskistr. 164 D-30177 Hannover, Germany Tel: 0511-33402-0 Fax: 0511-33402-34 Benelux Office Boschdijk 187a 5612 HB Eindhoven, The Netherlands Tel: 040-2445845 Fax: 040-2444580 Scandinavia Office P.O. Box 134 18322 Taeby, Sweden Tel: 08-6380820 Fax: 08-6380388 NEC Electronics (UK) Limited Cygnus House, Sunrise Parkway, Linford Wood, Milton Keynes, MK14 6NP, U.K. Tel: 01908-691-133 Fax: 01908-670-290 NEC Electronics (France) S.A. 9, rue Paul Dautier-B.P. 52 78142 Velizy-Villacoublay Cedex France Tel: 01-3067-5800 Fax: 01-3067-5899 Madrid Office Juan Esplandiu, 15 28007 Madrid, Spain Tel: 091-504-2787 Fax: 091-504-2860 NEC Electronics Italiana s.r.l. Via Fabio Filzi, 25/A, 20124 Milano, Italy Tel: 02-667541 Fax: 02-66754299
[Asia & Oceania] NEC Electronics Hong Kong Limited 12/F., Cityplaza 4, 12 Taikoo Wan Road, Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044 Seoul Branch 10F, ILSONG Bldg., 157-37, Samsung-Dong, Kangnam-Ku Seoul, the Republic of Korea Tel: 02-528-0303 Fax: 02-528-4411 NEC Electronics Taiwan Ltd. 7F, No. 363 Fu Shing North Road Taipei, Taiwan, R. O. C. Tel: 02-2719-2377 Fax: 02-2719-5951 NEC Electronics Singapore Pte. Ltd. 238A Thomson Road #12-01/10 Novena Square Singapore 307684 Tel: 253-8311 Fax: 250-3583
G01. 7
Document No. A10512EJCV0PF00(12th edition) Date Published September 2001 N CP(K)
(c) NEC Corporation 1990, 1998
Printed in Japan

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